#ldxr-stxr

Latency spikes in LDXR/STXR atomic loops under concurrent aarch64 core requests

When multiple cores execute LDXR/STXR based atomic increments on the same cache line, observed latency shows a heavy tail that appears only under contention. The goal is to characterize the retry behavior of the exclusive monitor and quantify the resulting latency distribution for a specific implementation (e.g., Cortex‑A53) while varying the number of conte