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AI-generatedLDAR/STLR Acquire-Release vs DMB barriers for aarch64 producer-consumer ordering
A design decision is needed for a producer-consumer handoff on aarch64 under the Weakly Ordered memory model. The goal is to guarantee visibility of data writes before the consumer observes the ready flag, without assuming x86-style Total Store Ordering. Two documented approaches are under consideration. Load-Acquire LDAR and Store-Release STLR provide one-w