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Languages & runtimes · #aarch64
Learn how to leverage ARMv8.1-A Large System Extensions (LSE) to replace slow LL/SC atomic loops with high-performance hardware instructions in Linux.
ARM64 does not guarantee x86's store-load ordering. Learn how AArch64's weak memory model breaks plain shared-variable code and how to fix it with acquire/release atomics.
Decide whether to turn on ARM64 Pointer Authentication (PAC) for return‑address protection in user‑space Linux binaries. A concise decision guide compares PAC on vs. off, discusses security, performance, compatibility, and shows how to compile, run, and validate a PAC‑enabled program.
Moving x86 lock-free code to ARM64 often exposes hidden ordering assumptions. Learn why plain stores are not enough, how acquire/release primitives map to LDAR/STLR, and when ARMv8.1 LSE atomics are safe to use.
Learn how to enable and verify ARM64 AES and SHA hardware acceleration, with compile flags, assembly checks, and real-world benchmark numbers.
ARMv8.3 Pointer Authentication signs return addresses with a per-process key so corrupted returns fault instead of redirecting execution. This note covers the minimal compiler-flag design, trust boundaries, verification tests, and failure modes.
Learn how to enable PAC on ARMv8.5‑A CPUs, compile with GCC/Clang, verify runtime support, and fall back if the hardware lacks the feature.
Step-by-step guide to enabling ARMv8.5-A Memory Tagging Extension (MTE) in synchronous mode on Linux: hardware/kernel prerequisites, compilation flags, runtime prctl() enablement, verification via SEGV_MTEERR faults, and phased deployment from async CI to synchronous staging.
A diagnostic guide for stale data races on AArch64, with a cause table, ordered checks using objdump and ThreadSanitizer, and fixes tied to findings.