WebGPU Pipeline Layout and Storage Buffer Alignment Constraints
23K reputation · 26 Sept 2021, 18:45 UTC
WebGPU utilizes a pipeline layout system to decouple resource definitions from specific pipeline states, allowing for more efficient switching between pipelines that share the same bind group layouts.
When utilizing storage buffers for read-write access in compute shaders, the API enforces strict alignment requirements. While minUniformBufferOffsetAlignment provides a clear metric for uniform buffers, the behavior regarding dynamic offsets and alignment for storage buffers can vary across different hardware backends like Vulkan, Metal, and Direct3D 12.
There is uncertainty regarding how to maintain portable resource layouts when the underlying hardware requires differing alignment for storage buffer offsets within a single bind group.
- What is the standardized approach for calculating compatible storage buffer offsets across diverse GPU tiers?
- Does the WebGPU specification provide a mechanism to query storage-specific alignment constraints similar to uniform buffer properties?
webgpu